Note: Name of presenter is listed in italics.
| 23 September |
|
Welcome
Mr. David Martinez / MIT Lincoln Laboratory
Electronic files not available |
Mission Keynote Speaker:
Mr. Randy Walden / Air Force Rapid Capabilities Office (SAF/ RCO)
Electronic files not available |
Opening Remarks
Mr. Robert Bond / MIT Lincoln Laboratory
Presentation - PDF || Presentation - PPT |
Invited: Case Studies Optimizing Applications for a 50 TFLOPS Cluster of PS3s
Richard Linderman / AFRL
Electronic files not available
|
Session 1: New Application Frontiers
Chair: Kenneth Teitelbuam / MIT Lincoln Laboratory
Auditorium
Presentation - PDF ||
Presentation - PPT |
Invited: New Sensor Signed Processing Paradigms:
When One Pass Isn’t Enough
Ed Baranoski / Argon ST
Presentation - PDF ||
Presentation - PPT |
Invited: The Six Day Spacecraft: Creating a Plug-And-Play Approach for Aerospace Systems
James Lyke / AFRL RV
Presentation - PDF |
Linear Algebraic Graph Algorithms for Back End Processing
Jeremy Kepner, Nadya Bliss and Eric Robinson / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT
|
Poster / Demo A: Advanced Systems
Chair: Kenneth Teitelbaum / MIT Lincoln Laboratory |
| Poster / Demo A Précis |
| Poster A.1 |
Multicore Acceleration of the Complex Ambiguity Function
Douglas Enright, Eric Dashofy, Michael AuYeung, R. Scott Boughton, J. Matt Clark and Ronald Scorfano, Jr. / The Aerospace Corporation
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster A.2 |
Re-Mapping of a Reconfigurable Generic Search DSP (RGSD) and a Generic Air Track Processor (GATP) to Multicore Technology with Linux SMP
Robert Hamilton and Bernard Pelon / CSP, Inc.
Abstract | Précis - PDF || Précis - PPT |
| Poster A.3 |
Efficient Multidimensional Polynomial Filtering for Nonlinear Digital Predistortion
Matthew Herman, Benjamin Miller and Joel Goodman / MIT Lincoln Laboratory
Abstract | Précis - PDF || Précis - PPT |
| Poster A.4 |
Designing Processing Architectures for Space Applications
John Holland and Eliot Glaser / Northrop Grumman Corporation
Abstract | Précis - PDF || Précis - PPT |
| Poster A.5 |
2D-3D Registration of Optical and Ladar Imagery for Real-Time Tracking
Andrew Mastin / MIT Lincoln Laboratory, Massachusetts Institute of Technology
Jeremy Kepner / MIT Lincoln Laboratory
John Fisher III / Massachusetts Institute of Technology
Abstract | Précis - PDF || Précis - PPT |
| Poster A.6 |
Leveraging Multi-Core Processors in a CDMA-2000 SDR Base Station
Steve Muir, John Chapin, Andrew Chiu, Victor Lum and Jeremy Nimmer / Vanu, Inc.
Abstract | Précis - PDF || Précis - PPT |
| Poster A.7 |
Channelization and Resampling Using a Graphics Processing Unit
Ambrose Slone, Paul Otto and Aqsa Kuraishi / SAIC
Abstract - PDF | Précis - PDF || Précis - PPT |
| Poster A.8 |
Not Presented |
| Poster A.9 |
High Performance Processing with MONARCH - A Case Study in CT Reconstruction
Kenneth Prager, David Rohler, Pat Marek and Lloyd Lewins / Raytheon Company
Abstract | Précis | Poster - PDF || Poster - PPT |
| Poster A.10 |
Not Presented |
| Poster A.11 |
Optimization of Embedded Linux systems without FPU
Sergey Panasyuk / SUNY Institute of Technology
Scott Spetka / SUNY Institute of Technology, ITT Corp
Abstract | Précis - PDF || Précis - PPT |
| Poster A.12 |
Radar Pulse Compression Using the NVidia CUDA Framework
Stephen Bash, David Carpman and David Holl / MIT Lincoln Laboratory
Abstract | Précis - PDF || Précis - PPT
|
Session 2: Multicore Architecture
Chair: Martin Herbordt / Boston University
Auditorium
Electronic files not available |
Focus 2: Multicore Applications
Chair: Larry Bergman / Jet Propulsion Laboratory
Room S2-180
Electronic files not available |
Experience and Results Porting HPEC Benchmarks to MONARCH
Lloyd Lewins and Kenneth Prager / Raytheon Company
Abstract | Presentation - PDF ||
Presentation - PPT |
High-Performance, Parallel Embedded Architectures Using Acalis® CPU872 PowerPC® Multicore
John Swensen and Gail Walters / CPU Technology Inc.
Abstract | Presentation - PDF || Presentation - PPT |
Building Manycore Processor-to-DRAM Networks Using Monolithic Silicon Photonics
Ajay Joshi, Christopher Batten and Vladimir Stojanovic / Massachusetts Institute of Technology
Krste Asanovic / University of California at Berkeley
Abstract | Presentation - PDF || Presentation - PPT |
Porting Some Key Caltech & JPL Applications to a PS3 Cluster - A Wild Ride
Ed Upchurch / Caltech, Jet Propulsion Laboratory
Paul Springer / Jet Propulsion Laboratory
Mark Stalzer, Sean Mauch, John McCorquodale, and Jan Lindheim / Caltech
Abstract |
Presentation - PDF ||
Presentation - PPT |
Photonic Many-Core Architecture Study
Nadya Bliss / MIT Lincoln Laboratory
Krste Asanovic / University of California at Berkeley
Keren Bergman and Luca Carloni / Columbia University
Jeremy Kepner / MIT Lincoln Laboratory
Vladimir Stojanovic / Massachusetts Institute of Technology
Abstract | Presentation - PDF || Presentation - PPT |
Introspection-Based Fault Tolerance for Future On-Board Computing Systems
Mark James and Hans Zima / Jet Propulsion Laboratory, California Institute of Technology
Abstract |
Presentation - PDF ||
Presentation - PPT |
When Multicore Isn't Enough: Trends and the Future for Multi-Multicore Systems
Matthew Reilly / SiCortex, Inc.
Abstract | Presentation - PDF |
|
Invited: Cloud-in-the-Can: Macro-architectures and Programing Models
Bill Butera / Mitsubishi Electric Research Laboratories
Electronic files not available |
|
Closing Remarks / Adjourn
Jeremy Kepner / MIT Lincoln Laboratory |
|
Banquet Speaker:
Dr. Richard Stallman / Free Software Foundation
Electronic files not available |
|
|
| 24 September |
Announcements
Mr. Robert Bond / MIT Lincoln Laboratory
Electronic files not available |
|
Technology Keynote Speaker
Dr. Charles Morefield / DARPA IPTO
Electronic files not available |
|
Session 3: GPUs
Peter Boettcher / MIT Lincoln Laboratory
Auditorium
Electronic files not available |
Focus 3: FPGA
Michael Vai / MIT Lincoln Laboratory
Room S2-180
Electronic files not available |
Using GPUs to Enable Highly Reliable Embedded Storage
Matthew Curry and Anthony Skjellum / University of Alabama
H. Lee Ward and Ron Brightwell / Sandia National Laboratories
Abstract | Presentation - PDF || Presentation - PPT |
2D Phase Unwrapping on FPGAs and GPUs
Sherman Braganza and Miriam Leeser / Northeastern University
Abstract | Presentation - PDF || Presentation - PPT |
Extending VForce to Include Support for NVIDIA GPUs using CUDA
Dennis Cuccaro, Nicholas Moore and Miriam Leeser / Northeastern University
Laurie Smith King / College of the Holy Cross
Abstract | Presentation - PDF |
Multicore versus FPGA in the Acceleration of Discrete Molecular Dynamics
Tony Dean, Josh Model and Martin Herbordt / Boston University
Abstract | Presentation - PDF || Presentation - PPT |
GPU VSIPL: High-Performance VSIPL Implementation for GPUs
Andrew Kerr, Dan Campbell and Mark Richards / Georgia Institute of Technology
Abstract | Presentation - PDF || Presentation - PPT |
An Ethernet-Accessible Control Infrastructure for Rapid FPGA Development
Andrew Heckerling, Thomas Anderson, HuyTam Nguyen, Greg Price, Sara Siegal and John Thomas / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
Power Consumption of Desktop and Mobile GPU’s for IRSTAP Applications
Michael Roeder, Jeremy Furtek, Nolan Davis, Cezario Tebcherani, Masatoshi Tanida and Dennis Braunreiter / SAIC
Abstract | Presentation - PDF || Presentation - PPT |
|
|
Poster / Demo B: Novel Computing Hardware
Chair: Peter Boettcher / MIT Lincoln Laboratory
Electronic files not available |
| Poster / Demo B Précis |
| Poster B.1 |
Resource-aware Distributed Block-based LU Decomposition on Wireless Sensor Networks
Sherine Abdelhak, Jared Tessier, Soumik Ghosh and Magdy Bayoumi / University of Louisiana at Lafayette
Abstract | Précis | Poster - PDF |
| Poster B.2 |
Application Implementation on the Cell B.E. Processor: Techniques Employed
John Freeman, Diane Brassaw, Rich Besler, Brian Few, Shelby Davis and Ben Buley / Black River Systems Company, Inc.
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.3 |
Embedding Constraint Satisfaction using Parallel Soft-Core Processors on FPGAs
Prasad Subramanian and Brandon Eames / Utah State University
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.4 |
Hardware-in-the-Loop Simulation with the Common Simulation Framework
Judith Gardiner / Ohio Supercomputer Center
Abstract | Précis | Poster - PDF || Précis - PPT |
| Poster B.5 |
SmartCell: Architecture, Design and Performance Analysis for Reconfigurable Embedded Computing
Xinming Huang / Worcester Polytechnic Institute
Abstract | Précis - PDF || Précis - PPT |
| Poster B.6 |
Impact on High Performance Applications: FPGA Chip Bandwidth at 40nm
J. Ryan Kenny / Altera Corporation
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.7 |
Implementation of a Highly Parameterized Digital PIV System On Reconfigurable Hardware
Abderrahmane Bennis, Miriam Leeser, and Gilead Tadmor / Northeastern University
Russ Tedrake / Massachusetts Institute of Technology
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.8 |
A Next-Generation Many-core Processor with Reliability, Fault Tolerance and Adaptive Power Management Features Optimized for Embedded and High Performance Computing Applications
Simon McIntosh-Smith / ClearSpeed Technology plc
Abstract | Précis - PDF || Précis - PPT |
| Poster B.9 |
Converged Sensor Network Architecture (CSNA)
Ian Dunn, Michael Desrochers and Robert Cooper / Mercury Computer Systems, Inc.
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.10 |
NMP ST8 Dependable Multiprocessor (DM)
John R. Samson, Jr. / Honeywell International, Aerospace Systems
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster B.11 |
Threading Opportunities in High-Performance Flash-Memory Storage
Craig Ulmer / Sandia National Laboratories
Maya Gokhale / Lawrence Livermore National Laboratory
Abstract | Précis | Poster - PDF || Précis - PPT |
| Poster B.12 |
Accelerating Floating Point DGEMM on FPGAs
Martin Langhammer and Thomas VanCourt / Altera Corporation
Abstract | Précis | Poster - PDF || Précis - PPT |
| |
|
Session 4: Networking
Chair: Rick Pancoast / Lockheed Martin
Auditorium
Presentation - PDF || Presentation - PPT |
Focus 4: Cell
Chair: Richard Linderman / AFRL
Room S2-180
Electronic files not available |
Using Layer 2 Ethernet for High-Throughput, Real-Time Applications
Robert Blau / Mercury Computer Systems, Inc.
Abstract | Presentation - PDF || Presentation - PPT |
Synthetic Aperture Radar Backprojection on Sony PlayStation 3 Cell Broadband Engine and Intel Quad-core Xeon
Mark Backues / SET Corporation
Uttam (Tom) Majumder / AFRL
Daniel York / SOCHE
Michael Minardi / AFRL
Abstract | Presentation - PDF || Presentation - PPT |
Performance and Energy Comparison of Electrical and Hybrid Photonic Networks for CMPs
Shoaib Kamil / University of California at Berkeley, Lawrence Berkeley National Laboratory
Ankit Jain and Marghoob Mohiyuddin / University of California at Berkeley
John Shalf / Lawrence Berkeley National Laboratory
John Kubiatowicz / University of California at Berkeley
Abstract | Presentation - PDF || Presentation - PPT |
Large Multicore FFTs: Approaches to Optimization
Sharon Sacco / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
Invited: A Real-Time Publish-Subscribe Control Plane for a COTM Node
Darby Mitchell / MIT Lincoln Laboratory
Presentation - PDF ||
Presentation - PPT |
Optimizing Discrete Wavelet Transform on the Cell Broadband Engine
Seunghwa Kang and David Bader / Georgia Institute of Technology
Abstract | Presentation - PDF || Presentation - PPT |
Panel: Paving the Way for Multicore Open Systems Architectures
Moderator: Dr. James C. Anderson / MIT Lincoln Laboratory
Presentation - PDF ||
Presentation - PPT |
|
Distinguished Panelists:
Prof. Saman Amarasinghe / Massachusetts Institute of Technology CSAIL
Mr. Markus Levy / The Multicore Association and The Embedded Microprocessor Benchmark Consortium
Abstract | Presentation - PDF || Presentation - PPT
Dr. Steve Muir / Vanu, Inc.
Mr. Matthew Reilly / SiCortex, Inc.
Presentation - PDF |
Presentation - PPT
Mr. John Rooks / AFRL/RITC |
|
| Closing Remarks / Adjourn |
|
|
| 25 September |
Announcements
Mr. Robert Bond / MIT Lincoln Laboratory
|
|
Session 5: Innovative Software Tools
Chair: Craig Lund / Independent Consultant
Auditorium
Electronic files not available |
Focus 5: Benchmarking
Chair: John Grosh / Lawrence Livermore National Laboratory
S2-180
Electronic files not available |
PVTOL: Designing Portability, Productivity and Performance for Multicore Architectures
Hahn Kim, Nadya Bliss, Jim Daly, Karen Eng, Jeremiah Gale, James Geraci, Ryan Haney, Jeremy Kepner, Sanjeev Mohindra, Sharon Sacco and Edward Rutledge / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
Evaluating the Productivity of a Multicore Architecture
Jeremy Kepner and Nadya Bliss / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
Parallelizing QR Decompositions with the R-Stream Compiler
Allen Leung, Nicolas Vasilache, Benoît Meister and Richard Lethin / Reservoir Labs, Inc.
Abstract | Presentation - PDF || Presentation - PPT |
Fixed and Reconfigurable Multi-Core Device Characterization for HPEC
Jason Williams, Alan George, Justin Richardson, Kunal Gosrani and Siddarth Suresh / University of Florida
Abstract | Presentation - PDF || Presentation - PPT |
CrossCheck: Improving System Confidence through High-Speed Dynamic Property Checking
Jonathan Springer, James Ezick and David Wohlford / Reservoir Labs, Inc. Matthew Craven and Rick Buskens / Lockheed Martin
Abstract | Presentation - PDF |
Runtime Performance Monitoring of Architecturally Diverse Systems
Joseph Lancaster and Roger Chamberlain / Washington University in St. Louis
Abstract | Presentation - PDF || Presentation - PPT |
Simple, Efficient, Portable Decomposition of Large Data Sets
William Lundgren / Gedae, Inc.
David Erb and Max Aguilar / IBM
Kerry Barnes and James Steed / Gedae, Inc.
Abstract | Presentation - PDF || Presentation - PPT |
|
Structural Object Programming Model: Enabling Efficient Development on Massively Parallel Architectures
Laurent Bonetto, Brad Budlong, Michael Butts and Paul Wasson / Ambric, Inc.
Abstract | Presentation - PDF || Presentation - PPT |
|
|
Poster / Demo C: Multicore Programming Environments
Chair: Craig Lund / Independent Consultant
Electronic files not available |
| Poster / Demo C Précis |
| Poster C.1 |
Rad Hard By Software for Space Multicore Processing
David Bueno, Dave Campagna, Dave Kessler and Eric Grobelny / Honeywell Inc.
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster C.2 |
Program Generation with Spiral: Beyond Transforms
Franz Franchetti, Daniel Mcfarlin, Frédéric de Mesmay, Hao Shen, Tomasz Wlodarczyk, Srinivas Chellappa, Marek Telgarsky, Peter Milder, Yevgen Voronenko, Qian Yu, James Hoe, José Moura and Markus Püschel / Carnegie Mellon University
Abstract | Précis - PDF || Précis - PPT |
| Poster C.3 |
A General Framework for Multicore Programming with Sourcery VSIPL++
Brooks Moses, Jules Bergmann, Stefan Seefeld, Don McCoy and Mike LeBlanc / CodeSourcery, Inc.
Abstract | Précis - PDF || Précis - PPT |
| Poster C.4 |
Measurement, Visualization, and Improvement of Linux Cluster Performance
Paul Howard, Bruce Schulman and Stephen Fried / Microway, Inc.
Abstract | Précis - PDF || Précis - PPT |
| Poster C.5 |
Partitioned FFTC: An Improved Fast Fourier Transform for the IBM Cell Broadband Engine
Andrew Shaffer, Bruce Einfalt and Padma Raghavan / Pennsylvania State University
Abstract | Précis - PDF || Précis - PPT |
| Poster C.6 |
Parallelization of NUFFT with Radial Data on Multicore Processors
Nikos Pitsianis and Xiaobai Sun / Duke University
Abstract | Précis - PDF || Précis - PPT |
| Poster C.7 |
LabVIEW Real Time for High Performance Control Applications
Aljosa Vrancic and Lothar Wenzel / National Instruments
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster C.8 |
An Approach Using the Data Distribution Service as the Connecting Transport for 100X Joint Battlespace Infosphere Servers
Lei Zhao, Douglas Blough, Vincent Mooney III and Justin Fiore / Georgia Institute of Technology
Abstract | Précis | Poster - PDF || Précis | Poster - PPT |
| Poster C.9 |
Hard Real-time Scheduling Framework on CellBE
Bach D. Bui, Deepti K. Chivukula, Marco Caccamo and Lui Sha / Department of Computer Science University of Illinois at Urbana Champaign
Abstract | Précis - PDF || Précis - PPT |
|
Session 6: Awards Session
Chair: James Lebak / The MathWorks
Auditorium
Electronic files not available |
Theory of Multicore Algorithms
Jeremy Kepner and Nadya Bliss / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
*GPU Performance Assessment with the HPEC Challenge
Andrew Kerr, Dan Campbell and Mark Richards / Georgia Institute of Technology
Abstract | Presentation - PDF || Presentation - PPT |
*Scalable SAR with Sourcery VSIPL++ for the Cell/B.E.
Jules Bergmann, Mike LeBlanc, Don McCoy, Brooks Moses and Stefan Seefeld / CodeSourcery, Inc.
Abstract |
Presentation - PDF ||
Presentation - PPT |
*Language, Dialect, and Speaker Recognition Using Gaussian Mixture Models on the Cell Processor
Nicolas Malyska, Sanjeev Mohindra, Douglas Reynolds and Jeremy Kepner / MIT Lincoln Laboratory
Abstract | Presentation - PDF || Presentation - PPT |
*Generating High-Performance General Size Linear Transform Libraries Using Spiral
Yevgen Voronenko, Franz Franchetti, Frédéric de Mesmay and Markus Püschel / Carnegie Mellon University
Abstract | Presentation - PDF || Presentation - PPT |
Invited: The Next "Big Thing" for High Performance Embedded Computing: Cyber Security and Information Assurance
John Grosh / Lawrence Livermore National Laboratory
Electronic files not available |
| Adjourn |