HPEC 2002 Workshop Agenda

Tuesday, 24 September
Wednesday, 25 September
Thursday, 26 September
 
Tuesday, 24 September
0730

Check-In & Continental Breakfast
AUDITORIUM
0830
Welcome
David Briggs / MIT Lincoln Laboratory
0835
Keynote Address
Perspective on Embedded Computing
Maj Gen Paul Nielsen / AFRL
0905
Opening Remarks
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0915
Session 1:  Novel Hardware Architectures
David Martinez / MIT Lincoln Laboratory
Presentation: PDF | Powerpoint
0925
Invited Speaker
Cognitive Information Processing Technology
Zach Lemnios / DARPA / IPTO 
Presentation: PDF | Powerpoint
0955
Invited  Speaker
MIND: Scalable Embedded Computing Through Advanced Processor in Memory (PIM) Architecture
Thomas Sterling / CalTech / JPL
Abstract | Presentation: PDF | Powerpoint
1025
Break
1140
Poster / Demo A: Hardware Architectures and Applications
Henk Spaanenburg / Pentum Group, Inc.
 
Poster Session A Précis
Poster A.1
A High Speed Signal Processing System
Anders Ahlander / Ericsson Microwave  Systems
Anders Astrom / Ericsson Microwave  Systems
Abstract | Précis | Presentation: PDF | Powerpoint
Poster A.2
An Innovative High Performance Architecture for Vector and Matrix Math Algorithms
Vera Anantha / Intrinsity, Inc.
Christophe Harle / Intrinsity, Inc.
Tim Olson / Intrinsity, Inc.
George Yost / Intrinsity, Inc.
Art Parmet / Intrinsity, Inc.
Abstract | Précis | Presentation: PDF | Powerpoint
Poster A.3
Real-Time Geo-Registration on High-Performance Computers
Alan Chao / ALPHATECH, Inc.
Monica Burke / ALPHATECH, Inc.
Thomas Kurien / Mercury Computer Systems, Inc.
Luke Cico / Mercury Computer Systems, Inc
Abstract | Précis | Presentation: PDF | Powerpoint
Poster A.4
Algorithmic Advances for Software Radios
Matteo Frigo / Vanu Inc.
Abstract | Précis | Presentation: PDF
Poster A.6
The Raw Microprocessor: Enabling Embedded Signal Processing on a General Purpose Computer Architecture
Hank Hoffmann / MIT 
Volker Strumpen / MIT 
Anant Agarwal / MIT
Abstract | Précis | Presentation: PDF
Poster A.7
A Study of the Common Component Architecture (CCA) Forum Software
Daniel Katz / Jet Propulsion Laboratory / Caltech
Robert Tisdale / Jet Propulsion Laboratory / Caltech
Charles Norton / Jet Propulsion Laboratory / Caltech
Abstract | Précis | Presentation: JPEG
Poster A.8
Signal Processing Architectures for Ultra-Wideband Wide-Angle Synthetic Aperture Radar Applications
Atindra Mitra / AFRL
Joseph Germann / SKY Computers, Inc.
John Nehrbass / Ohio State University
Abstract | Précis | Presentation: PDF | Powerpoint
Poster A.9
Implementing Image Processing Pipelines in a Hardware / Software Environment
Heather Quinn / Northeastern University
Miriam Leeser / Northeastern University
Laurie Smith-King / College of the Holy Cross
Abstract | Précis | Presentation: PDF | Powerpoint
Poster A.10
Adaptive Framework for Automated Mapping and Architecture Trades for Embedded Heterogeneous Systems
Raju Venkataramana / Tandel Systems, LLC
Joseph Philipose / Tandel Systems, LLC
Abstract | Précis | Presentation: PDF | Powerpoint
1235
Lunch
1345
Session 2:  Advanced Hardware Designs
Maya Gokhale / Los Alamos National Laboratory
Presentation: PDF | Powerpoint
1355
Adaptive Beamforming using QR in FPGA
Richard Walke / QinetiQ LTD
Abstract | Presentation: PDF | Powerpoint
1425
Power Consumption of Customized Numerical Representations for Audio Signal Processing
Roger Chamberlain / Washington University
Yen Hsiang Chew / Washington University
Varuna DeAlwis / Washington University
Eric Hemmeter / Washington University
John Lockwood / Washington University
Robert Morley / Washington University
Ed Richter / Washington University
Jason White / Washington University
Huakai Zhang / Washington University
Abstract | Presentation: PDF | Powerpoint
1455
A Library of Parameterized Hardware Modules for Floating-Point Arithmetic and Its Use 
Miriam Leeser / Northeastern University
Pavle Belanovic / Northeastern University
Abstract | Presentation: PDF | Powerpoint
1525
Break
1550
Generation of Custom DSP Transform IP Cores: Case Study Walsh-Hadamard Transform
Fang Fang / Carnegie Mellon University
James Hoe / Carnegie Mellon University
Markus Pueschel / Carnegie Mellon University
Smarahara Misra / Carnegie Mellon University
Abstract | Presentation: PDF | Powerpoint
1620
A Comparison of Two Computational Technologies for Digital Pulse Compression
Michael Bonato / Catalina Research Inc.
Abstract | Presentation: PDF | Powerpoint
1650
Adjourn
1700
Reception
1800
Banquet Speaker
50 Years of Mathematical Software
Cleve Moler / The MathWorks, Inc.
1845
Banquet
Wednesday, 25 September
0730
Check-In & Continental Breakfast
AUDITORIUM
0830
Announcements
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0835
Invited Speaker
Use of "Streaming" Computation to Build Efficient High-Performance Embedded Systems
William Dally / Stanford University
Presentation: PDF
0905
Session 3:   Compiler and Library Technologies
Joseph Germann / SKY Computers, Inc.
Presentation: PDF
0915
Short Vector SIMD Code Generation for DSP Algorithms
Franz Franchetti / Technical University of Vienna
Markus Pueschel / Carnegie Mellon University
Jose Moura / Carnegie Mellon University
Christoph Ueberhuber / Technical University of Vienna
Abstract | Presentation: PDF | Powerpoint
0945
sc2 C-to-FPGA Compiler
Maya Gokhale / Los Alamos National Laboratory
Jan Stone / Stone Ergonaut
Jan Frigo / Los Alamos National Laboratory 
Christine Ahrens / Los Alamos National Laboratory
Abstract | Presentation: PDF | Powerpoint
1015
Break
1030
Monolithic Compiler Experiments using C++ Expression Templates
Lenore Mullin / MIT Lincoln Laboratory
Edward Rutledge / MIT Lincoln Laboratory
Robert Bond / MIT Lincoln Laboratory
Abstract | Presentation: PDF | Powerpoint
1100
Streaming and Dynamic Compilers for High Performance Embedded Computing 
Peter Mattson / Reservoir Labs, Inc.
Jonathan Springer / Reservoir Labs, Inc.
Charles Garrett / Reservoir Labs, Inc.
Richard Lethin / Reservoir Labs, Inc.
Abstract | Presentation: PDF | Powerpoint
1130
Poster / Demo B: Software Technologies and Systems
Robert Bernecky / NUWC
Presentation: PDF | Powerpoint
Poster Session B Précis
Poster B.1
An Integrated Design Environment to Evaluate Power/Performance Tradeoffs for Sensor Network Applications
Amol Bakshi / University of Southern California
Jingzhao Ou / University of Southern California
Viktor Prasanna / University of Southern California
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.2
Distributed Data Management Architecture for Embedded Computing
Hans-Werner Braun / University of California
Todd Hansen / University of California
Bertram Ludaescher / University of California
John Orcutt / Scripps Institute of Oceanography / UCSD
Arcot Rajasekar / University of California
Frank Vernon / Scripps Institute of Oceanography / UCSD
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.3
Application of Operating System Concepts to Coordination in Pervasive Sensing and Computing Systems
Jesse Davis / University of Kansas
Joseph Evans / University of Kansas
Benjamin Ewy / Ambient Computing, Inc.
Larry Sanders / Ambient Computing, Inc.
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.4
Taskrunner: A Method for Developing Real-Time System Software
Louis Hebert / MIT Lincoln Laboratory
Abstract | Précis | Presentation: PDF
Poster B.5
Software Centric Optimization of a Real-Time Embedded System
Max Lee / Raytheon
Marshall Moluf / Raytheon
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.6
High Application Availability
Stephen Paavola / SKY Computers, Inc. 
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.7
Design Space Exploration and Optimization of Embedded Cache Systems via a Compiler
Krishna Palem / Georgia Institute of Technology
Rodric Rabbah / Georgia Institute of Technology
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.8
Resource Management for Digital Signal Processing via Distributed Parallel Computing
Albert Reuther / MIT Lincoln Laboratory
Joel Goodman / MIT Lincoln Laboratory
Abstract | Précis | Presentation: PDF
Poster B.10
Multidimensional Performance Modeling for Advanced, Embedded, Signal Processors
Michael Stebnisky / Lockheed Martin
Carl Hein / Lockheed Martin
Abstract | Précis | Presentation: PDF | Powerpoint
Poster B.11

Rapid Portable Signal Processing Software Development Architecture
Kevin Tirko / Pennsylvania State University
Abstract | Précis | Presentation: PDF | Powerpoint

Poster B.12
Real-Time Linux
Andrew Webber / Sky Computers, Inc.
Stephen Paavola / SKY Computers, Inc.
Abstract | Précis | Presentation: PDF | Powerpoint
1225
Lunch
1335
Session 4:   Emerging High Performance Software
David Cousins / BBN Technologies
Presentation: PDF | Powerpoint
1345
AltiVec Extensions to the Portable Expression Template Engine (PETE)
Edward Rutledge / MIT Lincoln Laboratory
Abstract | Presentation: PDF | Powerpoint
1445
300x Matlab
Jeremy Kepner / MIT Lincoln Laboratory
Abstract | Presentation: PDF | Powerpoint
1515
Break
1540
Rapid Prototyping of Matlab / Java Distributed Applications using the JavaPorts Components Framework
Elias Manolakos / Northeastern University
Abstract | Presentation: PDF | Powerpoint
1610
Meeting the Demands of Changing Operating Conditions at Runtime Through Adaptive Programming Techniques for Network Embedded Computing
Richard Schantz / BBN Technologies
Joseph Loyall / BBN Technologies
Abstract | Presentation: PDF | Powerpoint
1640
Applying Model-Integrated Computing and DRE Middleware to High Performance Embedded Computing Applications
Douglas Schmidt / DARPA / IXO
Aniruddha Gokhale / Vanderbilt University
Christopher Gill / Washington University
Abstract | Presentation: PDF | Powerpoint
1710
Invited Speaker
Designing the Future of Embedded Systems at DARPA IXO
Douglas Schmidt / DARPA / IXO
Presentation: PDF | Powerpoint
1740
Adjourn
Thursday, 26 September
0730
Check-In & Continental Breakfast
AUDITORIUM
0830
Announcements
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0905
Session 5: Government Sponsored  Standards
Edward Baranoski / MIT Lincoln Laboratory
Presentation: PDF | Powerpoint
0920
Development Status of the Vector, Signal, and Image Processing Library (VSIPL)
Mark Richards / Georgia Institute of Technology
Dan Campbell / Georgia Tech Research Institute
Randall Judd / SPAWAR
James Lebak / MIT Lincoln Laboratory
Rick Pancoast / Lockheed Martin
Abstract | Presentation: PDF | Powerpoint
0935
VSIPL++: Intuitive Programming Using C++ Templates
Mark Mitchell / CodeSourcery, LLC
Jeffrey Oldham / CodeSourcery, LLC
Abstract | Presentation: PDF | Powerpoint
0950
Data Reorganization Interface (DRI)
Kenneth Cain, Jr. / Mercury Computer Systems
Anthony Skjellum / MPI Software Technology
Abstract | Presentation: PDF | Powerpoint
1005
Software Communications Architecture Compliant Software Defined Radios
S. Murat Bicer / Mercury Computer Systems
Jeffrey Smith / Mercury Computer Systems
Abstract | Presentation: PDF | Powerpoint
1020
Break
1035
Session 6: Industry Sponsored Standards
Craig Lund / Mercury Computer Systems
Presentation: PDF | Powerpoint
1050
Progress in Standardization of RDMA Technology
Arkady Kanevsky / Network Appliance, Inc.
Abstract | Presentation: PDF | Powerpoint
1105
VXS - A Novel and Emerging Architecture for Embedded Computing
Jeffrey Harris / Motorola Computer Group
Abstract | Presentation: PDF | Powerpoint
1120
Status and Activity in the OMG Relevant to HPEC
James Kulp / Mercury Computer Systems
Abstract | Presentation: PDF | Powerpoint
1135
Poster / Demo C: Software / System Technologies
Brian Sroka / MITRE
Poster Session C Précis
Poster C.1
A Comparison of Java RMI, CORBA, and Web Services Technologies for Distributed SIP Applications
Mark Hanes / Ohio State University
Stan Ahalt / Ohio State University
Ashok Krishnamurthy / Ohio State University
Abstract | Precis | Presentation: PDF | Powerpoint
Poster C.2
Distribued Embedded Computing in the Detection of Explosives
Seemeen Karimi / Analogic Corporation
Barry Jackson / SKY Computers, Inc.
Carl Crawford / Analogic Corporation
Abstract | Precis | Presentation: PDF | Powerpoint
Poster C.3
What is Keeping Hard Real-Time Scheduling from being a Mainstream Technology in the Embedded Multiprocessing Domain Space?
Daniel Lorts / University of Texas at Dallas
Abstract | Precis | Presentation: PDF | Powerpoint
Poster C.5
VSIPL, from API to Product
Sharon Sacco / SKY Computers, Inc.
Abstract | Precis | Presentation: PDF | Powerpoint
Poster C.7
National Weather Radar Testbed System Implemented Using COTS and VSIPL
Bob Walsh / SKY Computers, Inc.
James Hunziker / Lockheed Martin
Tim Maese / Lockheed Martin
Walter Mazur / Lockheed Martin
Wayne Sabin / Lockheed Martin
Abstract | Precis | Presentation: PDF | Powerpoint
1230
Lunch
1340
Session 7: System Applications
Miriam Leeser / Northeastern University
Presentation: PDF | Powerpoint
1350
Missile Seeker Common Computer Signal Processing Architecture for Rapid Technology Upgrade
Daniel Rabinkin / MIT Lincoln Laboratory
Edward Rutledge / MIT Lincoln Laboratory
Paul Monticciolo / MIT Lincoln Laboratory
Abstract | Presentation: PDF | Powerpoint
1420
Hybrid QR Factorization Algorithm for High Performance Computing Architectures
Peter Vouras / Naval Research Laboratory
Gerard Meyer / Johns Hopkins University
Abstract | Presentation: PDF | Powerpoint
1450
Partitioning Computational Tasks within an FPGA + RISC Heterogeneous Multicomputer
John Bloomfield / Mercury Computer Systems, Inc.
Abstract | Presentation: PDF
1520
Break
1555
HPEC-SI Demonstration: Common Imagery Processor - APG-73 Image Formation
Brian Sroka / MITRE
Abstract
1625
High Bandwidth Reconfigurable Embedded Daughter Card Accelerator
Larry Ellcessor / Northrop Grumman
Geoffrey Weiss / Northrop Grumman
Michael Lucas / Northrop Grumman
Abstract
1655
Adjourn