AGENDA
| Check-In & Continental Breakfast | |
| AUDITORIUM | |
| Keynote Address Can We System Engineer the Course? Frank Perry (Chief Information Officer, Space & Naval Warfare Systems Command) |
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| Session
1: Systems Applications for Embedded Signal Processing Robert Graybill (Lockheed Martin) |
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| High-Performance
Computing for Deeply Embedded Missile Image/Signal Processing Applications Steve Wagner (Raytheon Missile Systems) Dennis Braunreiter (SAIC) |
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| Break | |
| A Ubiquitous
High-Performance Digital Pulse Compression System (DPCS) for the Kwajalein
Missile Range Moderization Program Stephen Rejto (MIT Lincoln Laboratory) Richard Gentile (MIT Lincoln Laboratory) Eric Willmann (MIT Lincoln Laboratory) |
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| Overcoming
Technical Challenges for FOPEN Radar Receiver Signal Processing on a
Airborne HPEC System Sreenidhi Tummala (Lockheed Martin) Stephen Paavola (SKY Computers) |
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| Poster
Session A: High-Performance Devices and Reconfigurable Computing Brent Nelson (Brigham Young University) |
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| Poster A.1 | Run-Time
Environment for Synthesis of Reconfigurable Hardware Ted Bapty (ISIS/Vanderbilt University) Sandeep Neema (ISIS/Vanderbilt University) Jason Scott (ISIS/Vanderbilt University) Janos Sztipanovits (ISIS/Vanderbilt University) |
| Poster A.2 | Mapping Signal
Processing Loops onto Reconfigurable Computing Architecture for Embedded
Applications Pedro Diniz (University of Southern California) |
| Poster A.3 | A
High-Performance In-Memory Reconfigurable Computing Architecture for
Embedded Applications Pedro Deniz (University of Southern California) |
| Poster A.4 | Streams-C:
Compiling a Stream-Based Language to Configurable Logic Maya Gokhale (Sarnoff Corporation) Jeffery Arnold (Sarnoff Corporation) James Kaba (Sarnoff Corporation) |
| Poster A.5 | Configurable
Micro-Accelerators for Sensor Processing Michael Lucas (Northrop Grumman) Richard Webb (Sarnoff Corporation) |
| Poster A.6 | Reconfigurable
Computing for High Performance Embedded Processing Systems Michael McCloskey (Lockheed Martin) Eric Pancost (Lockheed Martin) Paul Ramondetta (Lockheed Martin) |
| Poster A.7 | Algorithm
Analysis and Mapping Environment for Adaptive Computing Systems Eric Pauer (Sanders/Lockheed Martin) Christopher Crawford (Sanders/Lockheed Martin) Paul Fiore (Sanders/Lockheed Martin) Cory Myers (Sanders/Lockheed Martin) John Smith (Sanders/Lockheed Martin) Christopher Hyland (University of California) Edward Lee (University of California) James Lundblad (University of California) |
| Poster A.8 | RF Noise Shaping
Digital Receiver Technology Leopold Pellon (Lockheed Martin) Thomas Smith (Lockheed Martin) Robert Doak (Lockheed Martin) |
| Poster A.9 | A Two Teraops
Embedded Mixed-Signal Radar Receiver/Processor William Song (MIT Lincoln Laboratory |
| Poster A.10 | The Role of Field
Programmable Gate Arrays in Augmenting an Embedded AN/SPY-1 Radar Signal
Processor Frank Wallace (NSWCDD) Robert Hix (NSWCDD) Keith Merranko (NSWCDD) Ronald Stapleton (NSWCDD) |
| Session
2: Case Study Examples of High-Performance Architectures Edward Baranoski (MIT Lincoln Laboratory) |
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| Applying the
RASSP Process and High-Performance COTS Processors to Upgrade the SAIP SAR
Radar Processor William Ealy (Lockheed Martin) |
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| Performance
Evaluation of Massively Parallel Computers for AEGIS Signal Processing James Lebak (MIT Lincoln Laboratory) Edward Baranoski (MIT Lincoln Laboratory) |
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| Risk Reduction
Efforts for a COTS-Based Large Scale Radar Signal Processor James Reynolds (Lockheed Martin) Edward Monastra (Lockheed Martin) |
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| Break | |
| Session
3: Signal Processor Signals and Computing Technologies Dennis Braunreit (SAIC) |
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| Heterogeneous
Processor for FOPEN SAR David Coker (Integrated Sensors) James Graham (Integrated Sensors) Walter Szczepanski (Integrated Sensors) |
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| Mission-Specific
Optimization of Shared Memory Multi-Processors Douglas Goodman (SGI/Cray) William Harrod (SGI/Cray) |
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| Effective Methods
for Programming STAP Algorithms on Real-Time Embedded Signal Processors Bruce Hand (Northrop Grumman) |
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| Motorola's AtiVec
Technology for Embedded Applications Craig Lund (Local Knowledge) |
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| Check-In & Continental Breakfast | |
| AUDITORIUM | |
| Session
4: Middleware Libraries and Application Programming Interface Joseph Germann (SKY Computers) |
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| Portability
Issues on High-Performance Embedded Systems Featuring the Rosetta API and
MPI Mark Cotton (Lockheed Martin) Nathan Doss (Lockheed Martin) |
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| Vector, Signal
& Image Processing Standardization for Embedded Systems: VSIP 1.0 API David Schwartz (HRL Laboratory) |
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| The Deput of the
MPI/RT Standard Anthony Skjellum (Mississippi State University) Arkady Kanevsky (MITRE) |
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| The DARPA
Data Reorganization Effort- Transpose and Reshape API's for High
Performance Message-Oriented Middleware Anthony Skjellum (MPI Software technology) Clayborne Taylor (MPI Software technology) |
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| Standards-Based
Real-Time Embedded High Performance Computing: RT_STAP Case Study Kenneth Cain (MITRE) Richard Games (MITRE) Brian Sroka (MITRE) |
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| Poster
Session B: Algorithm Mapping and System Development Tools David Martinez (MIT Lincoln Laboratory) |
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| Poster B.1 | RTExpress: A
Rapid Prototyping Environment for Real-Time Embedded Systems Milissa Benincasa (Integrated Sensors) Richard Besler (Integrated Sensors) Diane Brassaw (Integrated Sensors) John Steill (Integrated Sensors) |
| Poster B.2 | Performance of
the Scalable Programming Environment Dennis Cottel (SPAWAR, University of Southern California) Perry Partow (SPAWAR, University of Southern California) |
| Poster B.3 | Multicomputer
Processor Configuration for Real-Time Data Flow Processing Applications Thomas Einstein (Mercury Computer) |
| Poster B.4 | Implementation of
the STAP Library and Framework (STAPL) for Real-Time Matrix-Based Signal
Processing Curtis Heisey (MIT Lincoln Laboratory) Christopher Adamo (MIT Lincoln Laboratory) Masahiro Arakawa (MIT Lincoln Laboratory) Paul Baggeroer (MIT Lincoln Laboratory) James Daly (MIT Lincoln Laboratory) Cecelia Deluca (MIT Lincoln Laboratory) W. Dale Hall (MIT Lincoln Laboratory) Kimberly Pickard (MIT Lincoln Laboratory) H. Austin Spang (MIT Lincoln Laboratory) |
| Poster B.5 | Exploiting
Instruction-Level Parallelism on Embedded Digital Signal Processors Using
Code Motion Vipin jain (University of Cincinnati) Santosh Pande (University of Cincinnati) |
| Poster B.6 | Interfacing
Interpreted and Complied Languages for Computing on a Massively Parallel
Network of Workstations (MP-NOW) Jeremy Kepner (Princeton University) John DeGood (Sarnoff Corporation) Maya Gokhale (Sarnoff Corporation) Aaron Marks (Sarnoff Corporation) Ron Minnich (Sarnoff Corporation) |
| Poster B.7 | The
Expressiveness of the GEDAE Graph Language William Lundgren (Lockheed Martin) |
| Poster B.8 | Multi_Domain
Embedded System Architect (MESA): A Tool for the Design of Real-Time
Parallel Applications on High Performance Computing Platforms Minesh Patel (Honeywell) Devesh Bhatt (Honeywell) William Wren (Honeywell) |
| Poster B.9 | Performance Modeling for Design and Analysis
of a High-Performance Radar Signal Processor Rathin Putatunda (Lockheed Martin) Rocco Tinari (Lockheed Martin) |
| Poster B.10 | PacketWay - A
Standard for Connecting SAN's, LAN's and Embedded Multicomputers Without
Using IP Anthony Skjellum (MSU) Robert George (MSU) Matthew Gleeson (MSU) Daniel Cohen (Myricom) |
| Break | |
| Session
5: Software Architectures, Reusability and Scalability Robert Bond (MIT Lincoln Laboratory) |
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| Application-Level
Fault Tolerance as a Complement to System-Level Fault Tolerance Joshua Haines (University of Massachusetts) Isreal Koren (University of Massachusetts) C. Mani Krishna (University of Massachusetts) Vijaya R. Lakamraju (University of Massachusetts) |
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| An Integrated
Scalable Hardware/Software Environment for Real-Time High Performance
Computing Applications Joseph Sgro (Alacron) |
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| Leveraging the Mainstream in High Performance
Embedded Computing (HPEC) Gerard Vichniac (Northrop Grumman) |
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| Session
6 : Benchmarking of Embedded Systems Michael Lucas (Northrop Grumman) |
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| Implementation
and Performance of an Embedded Parallel Adaptive Signal Processor Masahiro Arakawa (MIT Lincoln Laboratory) Robert Bond (MIT Lincoln Laboratory) Janice McMahon (MIT Lincoln Laboratory) |
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| Quantifying
Development Productivity for Scalable Embedded Computers Karen Lauro (Mercury Computer Systems) |
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| Assessing NOW
Architectures for Shipborne Processing Nicholas Carriero (Scientific Computer Systems) Andrew Sherman (Scientific Computer Systems) Janice McMahon (MIT Lincoln Laboratory) |
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| Adjourn | |