HPEC 2001 Workshop Preliminary Agenda


Tuesday, 27 November
Wednesday, 28 November
Thursday, 29 November

Tuesday, 27 November
0730 Check-In & Continental Breakfast
AUDITORIUM
0830 Welcome
David Briggs / MIT Lincoln Laboratory
0835 Keynote Address
Options for Embedded Systems
Gordon Bell / Microsoft
0905 Opening Remarks
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0915 Session 1:  Emerging Technologies
Richard Games / MITRE
0925 Invited Speaker
A DoD Perspective on High Performance Computing
John Grosh / OSD 
0955 Application Requirements Analysis for Polymorphous Computing Architectures
Janice McMahon / MIT Lincoln Laboratory
1025 Break
1040 Invited Speaker
SERIAL RapidIO
Douglas Endo / Raytheon
1110 Invited Speaker
Infiniband Architecture and Application to HPEC
Robert Zak / Sun Microsystems
1140 Poster Session A:  System Applications
Joseph Germann / Sky Computers

Poster Session A Précis
Poster A.1 Computational Analysis and Proposed Mapping for the Next Generation Mk 48 Heavyweight Torpedo Embedded Processor
Masahiro Arakawa / MIT Lincoln Laboratory
Poster A.2 Fault Tolerant Signal and Data Processing in Missile Defense Radars
Jay Cooper / Raytheon
Robert Oravits / United States Army Space and Missile Defense
Christopher Barnes / Georgia Tech Research Institute
Poster A.3 Dependence of Recognition Accuracy on Available Network Bandwidth
Michael Devore / Washington University
Joseph O'Sullivan / Washington University
Roger Chamberlain / Washington University
Mark Franklin / Washington University
Poster A.4 Parallel ATR Evaluation on NOW and Embedded Multiprocessor Systems
Gil Ettinger / ALPHATECH, Inc.
Monica Burke / ALPHATECH, Inc.
Poster A.5 Scalability of Embedded Automatic Target Recognition Algorithms
Paul Harmer / AFRL / SNAS
Tracey Smith / AFRL / SNAS
Terry McClurg / CSC
Poster A.6 Fault-Tolerance for Matrix and Signal Processing Applications
Daniel Katz / Jet Propulsion Laboratory
Poster A.7 Metric-Based Searches for Best Bands in Hyperspectral Imaging
Nirmal Keshava / MIT Lincoln Laboratory
Gary Shaw / MIT Lincoln Laboratory
Poster A.8 Parallel Multiple Hypothesis Tracker
Thomas Kurien / Mercury Computer Systems
Poster A.9 Dynamic Workload Scheduling in a Parallel Radar Signal Processor
James Lebak / MIT Lincoln Laboratory
Glenn Schrader / MIT Lincoln Laboratory
Jim Daly / MIT Lincoln Laboratory
Poster A.10 Floating Point Utilization of Commodity Processor SIMD Extensions for SIP Applications
Richard Linderman / AFRL
Jules Bergmann / AFRL
Dennis Fitzgerald / AFRL
Poster A.11 Video Processing for Defense Surveillance Applications
Rick Post / Agile Vision LLC
Arlan Pool / Mercury Computer Systems
Scott Thieret / Mercury Computer Systems
Poster A.12 A Givens Rotation Based VLSI Bit-Level Systolic Sample Matrix Inversion Architecture
Daniel Rabinkin / MIT Lincoln Laboratory
William Song / MIT Lincoln Laboratory
Michael Vai / MIT Lincoln Laboratory
Huy Nguyen / MIT Lincoln Laboratory
1235 Lunch
1345 Session 2:  New Applications
Daniel Katz / Jet Propulsion Laboratory
1355 Signal / Data Processor Implementation and Parallel Algorithms for Real-Time Wide-Angle Foliage Penetration (FOPEN) SAR Image Formation
Atindra Mitra / AFRL
Paul Maloney / Solers, Inc.
Dana Weick / Lockheed Martin
Joseph Germann / Sky Computers
1425 Parallel Matched-Field Tracking (MFT) for Distributed Deployable Systems
Jeong-Hae Han / University of Florida
Byungll Koh / University of Florida
Alan George / University of Florida
Keonwood Kim / University of Florida
1455 A Case for Utilizing Commercial Products for Radar Control Computing
Jeffrey Truslow / NSWC DD
1525 Break
1550 Flexible Architecture for Hyperspectral Image Processing on Reconfigurable Computers
Anthony Nelson / Los Alamos National Laboratory
Kevin McCabe / Los Alamos National Laboratory
1620 Wideband Networked Sensors Processing
Joseph Usoff / MIT Lincoln Laboratory
Bill Beavers / MIT Lincoln Laboratory
Jennifer Cox / MIT Lincoln Laboratory
1650 Adjourn
1700 Reception
1800 Banquet Speaker
Computing with Life
Thomas Knight / MIT AI Lab
1845 Banquet
Wednesday, 28 November
0730 Check-In & Continental Breakfast
AUDITORIUM
0830 Announcements
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0835 Invited Speaker
Matlab on Many Computers
Cleve Moler / The Mathworks
0905 Session 3:   Matlab / Simulink on Many Processors
Stan Ahalt / Ohio State
0915 Parallel Matlab
Alan Edelman / MIT
Ron Choy / MIT
0930 Heterogeneous Cluster Computing (HCC)
Cosmo Castellano / Integrated Sensors, Inc.
Edward McDermott / Integrated Sensors, Inc.
0945 Parallel Programming with MatlabMPI
Jeremy Kepner / MIT Lincoln Laboratory
1000 Break
1015 Session 4: Reconfigurable Computing
Robert Bernecky / NUWC
1025 Optimized Compilation of Embedded Applications on FPGAs
Wim Bohm / Colorado State University
Bruce Draper / Colorado State University
Walid Najjar / Colorado State University
Jeff Hammes / Colorado State University
Charlie Ross / Colorado State University
Monica Chawathe / Colorado State University
1055 Debugging Techniques for FPGA-Based Configurable Computing Systems
Brent Nelson / Brigham Young University
Brad Hutchings / Brigham Young University
Michael Wirthlin / Brigham Young University
1125 Employing Reconfigurable Hardware in a Networked Environment
Miriam Leeser / Northeastern University
Heather Quinn / Northeastern University
Laurie Smith King / College of the Holy Cross
1155 Poster Session B:  Hardware / System Technologies
Henk Spaanenburg / Mercury Computer Systems
Poster Session B Précis
Poster B.1 Reconfigurable Embedded Computing in Electronic Warfare Systems
Byron Coker / Georgia Tech Research Institute
Michael Kopp / Georgia Tech Research Institute
Michael Willis / Georgia Tech Research Institute
Poster B.2 Embedded Real-Time Signal Processing: A Distributed Memory Multicomputer Architecture with Low Latency, Flexible Data Distribution
Michael Harris / BAE Systems IEWS
Mark Law / BAE Systems IEWS
Todd Birkebak / BAE Systems IEWS
Poster B.3 Field Programmable Gate Arrays for Signal Processing
Matthew Krzych / NUWC
Poster B.4 Parameterized K-means Clustering for Rapid Hardware Development to Accelerate Analysis of Satellite Data
Miriam Leeser / Northeastern University
Pavle Belanovic / Northeastern University
Michael Estlick / Northeastern University
Maya Gokhale / Los Alamos National Laboratory
John Szymanski / Los Alamos National Laboratory
James Theiler / Los Alamos National Laboratory
Poster B.5 DG2VHDL: A Suite of Tool for Synthesizing VLSI Array Architectures
Elias Manolakos / Northeastern University
Andrew Stone / Northeastern University
Poster B.6 Simulated Radar Returns in Field Programmable Gate Arrays
Christopher Parris / Naval Surface Warfare Center Dahlgren Division
Ronald Stapleton / Naval Surface Warfare Center Dahlgren Division
Poster B.7 A New Data Distribution for Parallel LU Decomposition
Thomas Steck / Johns Hopkins University
Gerard Meyer / Johns Hopkins University
Poster B.8 An Application of Reconfigurable Front-End Processors in Scalable Embedded Systems for Lidar Based Mine Detection
Madhu Thoguluva / Northrop Grumman
Poster B.9 Mission Specific Signal Processing (MSSP) Custom Core Technology
Michael Vai / MIT Lincoln Laboratory
Huy Nguyen / MIT Lincoln Laboratory
William Song / MIT Lincoln Laboratory
1250 Lunch
1400 Session 5:   Advanced Hardware
Kenneth Teitelbaum / MIT Lincoln Laboratory
1410 An 0.25 Micron SOI Transposable Memory with Built-in Self-Test Circuitry
Jay Brockman / University of Notre Dame
Bedros Hanounik / University of Notre Dame
Peter Kogge / University of Notre Dame
1440 PIM- and Stream Processor-Based Systems
Jinwoo Suh / University of Southern California
Changping Li / University of Southern California
Steve Crago / University of Southern California
Robert Parker / University of Southern California
1510 The Raw Processor: A Composable 32-Bit Fabric for Embedded and General Purpose Computing
Michael Taylor / MIT
Jason Kim / MIT
Jason Miller / MIT
Fae Ghodrat / MIT
Ben Greenwald / MIT
Paul Johnson / MIT
Walter Lee / MIT
Albert Ma / MIT
Nathan Shnidman / MIT
David Wentzlaff / MIT
Matt Frank / MIT
Saman Amarasinghe / MIT
Anant Agarwal / MIT
1540 Break
1605 Performance Evaluation of a Reconfigurable, Embedded Photonic Multiring Interconnection Network
Roger Chamberlain / Washington University
Mark Franklin / Washington University
Praveen Krishnamurthy / Washington University
1635 How High Performance Computing May Enhance the Magnetospheric Multi Scale Mission
Michael Rilee / Emergent IT
Steven Curtis / NASA
Scott Boardsen / Emergent IT
Maharaj Bhat / Emergent IT
1705 Invited Speaker
Computing Biology
John Reynders / Celera Genomics
1735 Adjourn
Thursday, 29 November
0730 Check-In & Continental Breakfast
AUDITORIUM
0830 Announcements
Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory
0835 Invited Speaker
Network Centric Warfare and the Role of Embedded Computing
Thomas Elliott / DSR
0905 Session 6: Software Standards
Rick Pancoast / Lockheed Martin
0915 Status of the Vector, Signal, and Image Processing Library (VSIPL)
Mark Richards / Georgia Tech Research Institute
Randall Judd / SPAWAR Systems Center
James Lebak / MIT Lincoln Laboratory
Rick Pancoast / Lockheed Martin
Dan Campbell / Georgia Tech Research Institute
0930 Data Parallel CORBA Status
James Kulp / Mercury Computer Systems
0945 Data Reorganization Interface (DRI)
Kenneth Cain, Jr. / Mercury Computer Systems
Anthony Skjellum / MPI Software Technology
1000 Software Communications Architecture (SCA)
Jeffrey Smith / Mercury Computer Systems
S. Murat Bicer / Mercury Computer Systems
1015 Break
1030 Session 7: Advanced Software
Ralph Kohler / AFRL
1040 Measuring CORBA Performance for HPEC Algorithms
Bill Beckwith / Objective Interface Systems, Inc.
1110 Generating Platform-Adapted DSP Libraries Using SPIRAL
Jose Moura / Carnegie Mellon University
Jeremy Johnson / Drexel University
Robert Johnson / MathStar Inc.
D. Padua / University of Illinois At Urbana-Champaign
Viktor Prasanna / University of Southern California
Markus Pueschel / Carnegie Mellon University
Bryan Singer / Carnegie Mellon University
Manuela Veloso / Carnegie Mellon University
Jianxin Xiong / University of Illinois at Urbana-Champaign
1140 S3P: Automatic, Optimized Mapping of Signal Processing Applications to Parallel Architectures
Hank Hoffmann / MIT Lincoln Laboratory
Jeremy Kepner / MIT Lincoln Laboratory
Robert Bond / MIT Lincoln Laboratory
1210 Poster Session C: Software / System Technologies
Bill Bent / CSPI

Poster Session C Précis
Poster C.1 Customizable Middleware for Networks of Embedded Systems
Gul Agha / University of Illinois at Urbana-Champaign
Po-Hao Chang / University of Illinois at Urbana-Champaign
Koushik Sen / University of Illinois at Urbana-Champaign
Reza Ziaei / University of Illinois at Urbana-Champaign
Poster C.2 The Acoustic Analysis Workbench
Keith Bromley / SPAWAR
Robert Dukelow / SPAWAR
Jerry Symanski / SPAWAR
Poster C.3 Automatic Vectorization for AltiVec
John Carbone / Green Hills Software, Inc.
Poster C.4 A Model Integrated Simulation Integration Framework
James Davis / ISIS / Vanderbilt University
Akos Ledeczi / ISIS / Vanderbilt University
Sandeep Neema / ISIS / Vanderbilt University
Brandon Eames / ISIS / Vanderbilt University
Viktor Prasanna / University of Southern California
Cauligi Raghavendra / University of Southern California
Amol Bakshi / University of Southern California
Sumit Mohanty / University of Southern California
Vaibhav Mathur / University of Southern California
Mitali Singh / University of Southern California
Poster C.5 Profile-Guided Optimization Targeting High Performance Embedded Applications
David Kaeli / Northeastern University
Jeffrey Smith / Mercury Computer Systems
S. Murat Bicer / Northeastern University
Efe Yardimci / Northeastern University
Poster C.6 JavaPorts: An Environment for the Rapid Prototyping of Heterogeneous Network-Centric Distributed Processing Applications
Elias Manolakos / Northeastern University
Demetris Galatopoullos / Northeastern University
Andy Funk / Northeastern University
Poster C.7 SAGETM: A Multiple Platform Software Development and Integration Environment Diverse Applications
Minesh Patel / Honeywell Space Systems
Matthew Clark / Honeywell International
John Samson, Jr. / Honeywell Space Systems
Poster C.8 Open Standards and Source Advantages to the High Performance Embedded Computers Industry
Stephen Prause / CSPI
Poster C.9 Software Tools for High Performance Embedded Computing System Design and Code Generation
Christopher Robbins / MCCI
Poster C.10 Advanced VSIPL Computations Using C++
Anthony Skjellum / MPI Software Technology
Gary Boudreaux / MPI Software Software Technology
Poster C.11 VSIPL/ERI: Enhanced Reference Implementation of the Core VSIPL Library
Anthony Skjellum / MPI Software Technology
Gary Boudreaux / MPI Software Technology
Tim Campbell / Logicon
Walter Schakelford / Logicon
Howard Cohl / Logicon
Poster C.12 Implementation of the Intelligent Detector-Tracker Algorithm on Embedded Hardware Connected to a Local Area Network
James Steed / Blue Horizon Development Software
William Lundgren / Blue Horizon Development Software
Kerry Barnes / Blue Horizon Development Software
Doug Rawson-Harris / Thomson Marconi Sonar Limited
Roger Benton / Thomas Marconi Sonar Limited
Rob Taylor / Thomson Marconi Sonar Limited
1305 Lunch
1415 Session 8: Fault Tolerance
Craig Lund / Mercury Computer Systems
1425 MPI/FTTM: Enabling Technology for High Performance, High Availability Embedded User Applications
Murali Beddhu / MPI Software Technology
Anthony Skjellum / MPI Software Technology
Rajanikanth Batchu / Mississippi State University
1455 Commodity Based, High Availability Radar Signal ProcessingI
Joseph Caruso / Computer Sciences Corporation
1525 Application Level Fault Tolerance and Detection
Eric Ciocca / University of Massachusetts
Israel Koren / University of Massachusetts
C.M. Krishna / University of Massachusetts
1555 Break
1620 Invited Speaker
Export Control of High Performance Computing: Analysis and Future Directions
John Grosh / OSD
1650 Session 9: Advanced Systems (U.S. Only)
Philip Sementilli / Raytheon
1700 Standards-Based Real-Time Embedded High Performance Computing: Common Imagery Processor
Brian Sroka / MITRE
David Szakovits / Northrop Grumman
1730 Lessons Learned in the Testbed Development of a High Performance, High Availability Radar Signal Processing System Using COTS Hardware and Software Standards
Nathan Doss / Lockheed Martin
Michael Iaquinto / Lockheed Martin
1800 High Performance COTS Computing with a Two Microsecond Latency Budget: A Challenge to Embedded Processing Standards
Charles Kuning / Northrop Grumman
1830 Adjourn