HPEC 2000 Workshop Agenda |
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Wednesday, 20 September | |
0730 | Check-In & Continental Breakfast |
AUDITORIUM | |
0830 | Welcome David Briggs / MIT Lincoln Laboratory |
0835 | Keynote Address Charles Holland / DDR&E |
0905 | Opening Remarks Robert Bond / Jeremy Kepner / MIT Lincoln Laboratory |
0915 | Session 1: Enabling Hardware Technologies Michael Lucas / Northrop Grumman ESSD |
0925 | Applying Reconfigurable
Hardware to Segmentation for Multispectral Imagery Miriam Leeser / Northeastern University Michael Estlick / Northeastern University Natasha Kitaryeva / Northeastern University John Szymanski / Los Alamos National Laboratory James Theiler / Los Alamos National Laboratory |
0955 | Break |
1010 | Parallel C Programming of
Reconfigurable Computers: The Streams-C Approach Maya Gokhale / Los Alamos National Laboratory Janette Frigo / Los Alamos National Laboratory Janice Stone |
1040 | Implementing QR-Decomposition
on the Imagine Stream Processor Brian Towles / Stanford University William Dally / Stanford University Ujval Kapasi / Stanford University Brucek Khailany / Stanford University Peter Mattson / Stanford University Jinyung Namkoong / Stanford University John Owens / Stanford University Scott Rixner / Massachusetts Institute of Technology |
1110 | A 225 Billion Operations Per
Second Polyphase Channelizer Processor for Wideband Channelized Adaptive Sensor Array
Signal Processing William Song / MIT Lincoln Laboratory Albert Horst / MIT Lincoln Laboratory Huy Nguyen / MIT Lincoln Laboratory Daniel Rabinkin / MIT Lincoln Laboratory Michael Vai / MIT Lincoln Laboratory |
1140 | Poster
Session A: Advanced Hardware Systems Michael Vai / MIT Lincoln Laboratory |
Poster Session A Précis |
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Poster A.1 | An Economical 40 MHz Universal
Software Radio Using a Hybrid Approach Joseph Arrowood / Los Alamos National Laboratory Mark Dunham / Los Alamos National Laboratory Kevin McCabe / Los Alamos National Laboratory |
Poster A.2 | Task-Level Energy Minimization
for Reconfigurable Embedded Systems Hakan Aydin / University of Pittsburgh Rami Melhem / University of Pittsburgh Daniel Mosse / University of Pittsburgh |
Poster A.3 | Implementation and Optimization
of a Distributed Memory FFT Processor Robert Johnson / MathStar, Inc. Jeremy Johnson / Drexel University P. Kumhom / Drexel University P. Nagvajara / Drexel University |
Poster A.4 | FPGA Implementation of an
Adaptive Reconfigurable Image Encoder Sarin Mathen / ITTC Joseph Evans / ITTC/University of Kansas |
Poster A.5 | SCALIP: Scalable IP for
Systolic Applications Matthew Moe / Carnegie Mellon University Herman Schmit / Carnegie Mellon University |
Poster A.6 | Reconfigurable Video Processor Scott Morris / Raytheon Electronic Systems Gillian Groves / Raytheon Electronic Systems Stephanie Santos / Raytheon Electronic Systems |
Poster A.7 | A Processor-In-Memory (PIM)
Computing Architecture for Critical Navy Phased Array Radar Applications Stephen Shank / Lockheed Martin Richard Chau / Lockheed Martin Steve Crago / University of Southern California Walter Mazur / Lockheed Martin Eric Pancoast / Lockheed Martin Jinwoo Suh / University of Southern California |
Poster A.8 | A Dynamically Reconfigurable
Vision (DRV) System David Stack / Comptek Amherst Systems, Inc. Christopher Kramer / Comptek Amherst Systems, Inc. Badabrata Pain / Je Propulsion Laboratory |
Poster A.9 | A Hybrid FPGA/DSP/GPP Prototype
Architecture for SAR and STAP Jack West / University of Oklahoma John Antonio / University of Oklahoma Sudarshan Dhall / University of Oklahoma Hongping Li / University of Oklahoma Jeffrey Muehring / Texas Tech University Sirirut Vanichayobon / University of Oklahoma |
1220 | Lunch |
1305 | Session
2: High Performance Interconnects Robert Hoenig / SKY Computers, Inc. |
1315 | Performance Evaluation of
Opto-Electronic Interconnects for High Performance Computing Janice McMahon / MIT Lincoln Laboratory |
1345 | A Low-Cost 10 Gb/s Optical Link
for Embedded Computing Applications Warren Rosen / Drexel University L. Chen / Drexel University A.S. Daryoush / Drexel University R.N. Lachenmaier / Naval Air Systems Command-China Lake J. Lee / Drexel University N. Sharma / Drexel University |
1415 | Fairness Issues in an Embedded
Photonic Ring Interconnect Abhijit Mahajan / Washington University Roger Chamberlain / Washington University Mark Franklin / Washington University |
1445 | Distributed Corner Turn on a
PIM-Based Multiprocessor Jinwoo Suh / University of Southern California Steve Crago / University of Southern California Changping Li / University of Southern California Robert Parker / University of Southern California |
1515 | Break |
1530 | Session
3: Special Session: Software Standards and Their Application Richard Games / The MITRE Corporation |
1540 | The Vector, Signal, and Image
Processing Library (VSIPL): Emerging Implementations and Further Development Randall Janka / Georgia Tech Research Institute Randall Judd / SPAWARSYSCEN San Diego D857 James Lebak / MIT Lincoln Laboratory Mark Richards / Georgia Tech Research Institute |
1550 | Putting Messaging Middleware in
Perspective Anthony Skjellum / MPI Software Technology, Inc. Kenneth Cain / The MITRE Corporation Arkady Kanevsky / Mercury Computer Systems, Inc. James Lebak / MIT Lincoln Laboratory |
1600 | Data Reorganization and Future
Embedded HPC Middleware Kenneth Cain / The MITRE Corporation James Lebak / MIT Lincoln Laboratory Anthony Skjellum / MPI Software Technology, Inc. |
1610 | High Performance CORBA James Kulp / Mercury Computer Systems, Inc. |
1620 | Implementing VSIPL Using
Intelligent Compiler Technology Steve Paavola / SKY Computers, Inc. |
1640 | APIs, Benchmarking & Power
of Abstraction Arkady Kanevsky / Mercury Computer Systems, Inc. Michale Pepe / Mercury Computer Systems, Inc. |
1700 | A Parallel Algorithm for
Matched Field Processing Using MPI and VSIPL Randall Judd / SPAWAR SYSCEN San Diego |
1720 | COTS Software Portability
Standards and VSIPL Benchmarks Roelan Teachey / Lockheed Martin Billy Chin / Lockheed Martin Anthony Donadeo / Lockheed Martin Glenn Faix / Lockheed Martin Eric Pancoast / Lockheed Martin |
1740 | Adjourn |
1745 | Reception |
1830 | Banquet Speaker Quantum Computing Colin Williams / Jet Propulsion Laboratory |
1900 | Banquet |
Thursday, 21 September | |
0730 | Check-In & Continental Breakfast |
AUDITORIUM | |
0830 | Announcements Robert Bond / MIT Lincoln Laboratory |
0835 | Invited Speaker Blue Gene System Overview Marc Snir / IBM T.J. Watson Research Center |
0905 | Session 4:
Advanced Software Technologies Eric Pancoast / Lockheed Martin |
0915 | Environment for Implementing
DSP Algorithms in Reconfigurable Hardware Eric Pauer / Sanders, A Lockheed Martin Company Paul Fiore / Sanders, A Lockheed Martin Company Cory Myers / Sanders, A Lockheed Martin Company John Smith / Sanders, A Lockheed Martin Company |
0945 | Automated Empirical
Optimizations of Software and the ATLAS Project Antoine Petitet / University of Tennessee Jack Dongarra / University of Tennessee R. Clint Whaley / University of Tennessee |
1015 | Achieving Portable Task and
Data Parallelism on Signal Processing Architectures Hank Hoffmann / MIT Lincoln Laboratory Jim Daly / MIT Lincoln Laboratory Jan Matlis / MIT Lincoln Laboratory Patrick Richardson / MIT Lincoln Laboratory Edward Rutledge / MIT Lincoln Laboratory Glenn Schrader / MIT Lincoln Laboratory |
1045 | Break |
1100 | SPIRAL: Automatic
Implementation of Signal Processing Algorithms Jose Moura / Carnegie Mellon University Jeremy Johnson / Drexel University Robert Johnson / MathStar Inc. D. Padua / University of Illinois at Urbana-Champaign Viktor Prasanna / University of Southern California M. Puschel / Carnegie Mellon University M. Veloso / Carnegie Mellon University |
1130 | Poster
Session B: Middleware and Tools for Embedded Computing Larry Bergman / Jet Propulsion Laboratory/NASA |
Poster Session B Précis | |
Poster B.1 | Supercomputing Onboard the Next
Generation Space Telescope Maria Nieto-Santisteba / Space Telescope Science Institute Dale Fixsen / Raytheon/ITSS Robert Hanisch / STScl John Mather / NASA/GSFC Joel Offenberg / Raytheon/ITSS R. Sengupta / Raytheon/ITSS |
Poster B.2 | Towards Real-Time Adaptive QoS
Management in Middleware for Embedded Computing Systems Christopher Gill / Washington University David Levine / Washington University Douglas Schmidt / University of California, Irvine |
Poster B.3 | Integration of VSIPL and OpenMP
into a Parallel Image Processing Environment Jeremy Kepner / MIT Lincoln Laboratory |
Poster B.4 | Design Flow for Automatic
Mapping of Graphical Programming Applications to Adaptive Computing Systems Sze-Wei Ong / University of Tennessee Don Bouldin / University of Tennessee N. Kerkiz / University of Tennessee M. Langston / University of Tennessee D. Newport / University of Tennessee B. Srijanto / University of Tennessee C. Tan / University of Tennessee |
Poster B.5 | Autocoding Toolset - Automating
Parallel Code Generation from Graphical Design Specifications Christopher Robbins / MCCI |
Poster B.6 | C++ Expression Templates in an
Embedded, Parallel, Real-Time Signal Processing Library Edward Rutledge / MIT Lincoln Laboratory |
Poster B.7 | Model Based Parallel
Programming with Profile-Guided Application Optimization Jeffrey Smith / Mercury Computer Systems, Inc. David Kaeli / Northeastern University |
Poster B.8 | Advanced Radar Signal
Processing on General-Purpose Commercial Multiprocessor Systems Thomas Steck / Johns Hopkins University Ian Dunn / Johns Hopkins University Vilhelm Gregers-Hansen / Naval Research Laboratory Gerard Meyer / Johns Hopkins University John Roberts / Johns Hopkins University Peter Vouras / Naval Research Laboratory |
1210 | Lunch |
1255 | Session 5:
Embedded System Applications Dennis Braunreiter / Raytheon Missiles Systems |
1305 | An Embedded Reconfigurable
Computing Architecture Upgrade for a Legacy Radar Countermeasures Processor Eric Pancoast / Lockheed Martin Michael McCloskey / Lockheed Martin |
1335 | An Open Architecture for Next
Generation Space Onboard Processing David Ngo / Sanders, A Lockheed Martin Company Michael Harris / Lockheed Martin |
1405 | Audio & Speech Processing
Algorithms on Embedded Hardware: Custom vs. COTS Hardware & Software Douglas Smith / Air Force Research Laboratory |
1435 | Break |
1450 | Joint STARS Airborne Ground
Surveillance HPC Technology Development Initiatives Marc Campbell / Northrop Grumman Corporation Stephen Prause / Northrop Grumman Corporation |
1520 | Analysis of Computational
System Performance in Automatic Target Recognition Joseph O'Sullivan / Washington University Roger Chamberlain / Washington University Michael DeVore / Washington University Mark Franklin / Washington University |
1550 | Panel
Session: Starved for Data: Programmability, Reconfigurability, and the Memory
Hierarchy Moderator: Richard Linderman / Air Force Research Laboratory |
1710 | Adjourn |
Friday, 22 September | |
0730 | Check-In & Continental Breakfast |
AUDITORIUM | |
0830 | Announcements Robert Bond / MIT Lincoln Laboratory |
0835 | Invited Speaker High Performance Interconnects: Riding the Standards Wave Richard Lacerte / Nortel Networks |
0905 | Session 6:
New Frontiers: Applications and Technologies Daniel Katz / Jet Propulsion Laboratory/Caltech |
0915 | EDDDDI: Error Detection
by Diverse Data and Duplicated Instructions Nahmsuk Oh / Stanford University |
0945 | High Availability/Fault
Tolerant Signal Processor Architecture for Navy Theater Wide Radar Applications Rathin Putatunda / Lockheed Martin Edward Monastra / Lockheed Martin James Reynolds / Lockheed Martin |
1015 | Dynamic Workload
Re-Distribution for Fault Recovery in Embedded Systems James Lebak / MIT Lincoln Laboratory Aaron Hoffman / MIT Lincoln Laboratory Glenn Schrader / MIT Lincoln Laboratory |
1045 | Break |
1100 | Linux Lessons Craig Lund / Mercury Computer Systems, Inc. |
1130 | Real-Time Processing Challenges
of Hyperspectral Sensing Gary Shaw / MIT Lincoln Laboratory Nirmal Keshava / MIT Lincoln Laboratory Dimitris Manolakis / MIT Lincoln Laboratory |
1200 | Closing Remarks Robert Bond / MIT Lincoln Laboratory |
1210 | Lunch |
1240 | Adjourn |